ARM Notes
ARM基础，ARM调试，AARCH64
ARM 的寄存器
16个寄存器
| 编号 | 说明 |
|---|---|
| R0-R12 | 通用寄存器 |
| R13 | SP (stack pointer) |
| R14 | LR (link register) |
| R15 | PC (program counter) |
xPSR: Program Status Register (x: Current copy to Saved)
| PSR | Condition Flags |
|---|---|
| Q | Saturation |
| V | oVerflow |
| C | Carry |
| Z | Zero |
| N | Negative |
ARM 模式
ARM 的异常模式(Exception)
- 6种特权模式(Privileged Mode)，1种非特权模式(Unprivileged Mode)
| 简写 | 全称 | 中文 | 常见原因 |
|---|---|---|---|
| 特权模式 | |||
| abt | Abort | 内存访问错误 | |
| fiq | Fast Interrupt Request | ||
| irq | Interrupt Request | ||
| svc | Supervisor | 系统复位 | |
| sys | System | A special mode allow r/w to CPSR, no banked register | |
| und | Undefined | ||
| 非特权模式 | |||
| usr | User Mode |
ARM 指令集
条件执行 (Conditional Execution )
| 简写 | 全称 |
|---|---|
| EQ | Equal |
| NE | Not equal |
| CS | Carry set, Greater than |
| CC | Carry clear, Less than |
| MI | Minus, Less than |
| PL | Plus, Greater than |
| VS | Overflow |
| VC | No overflow |
| HI | Greater than |
| LS | Less than or equal |
| GE | Greater than or equal |
| LT | Lesser than |
| GT | Greater than |
| LE | Lesser than or equal |
后缀
.N Narrow, 16位ARM指令 .W Wide, 32位ARM指令
Cache L1 Cache Level composes Cache and Write Buffer Logical Cache & Physical Cache
The L1 Cache is Harvard (Separate instruction and data) The L2 cache is Von Neumann
Dirty bit: Cache data different from memory Bit:
Register Call Save R0~R3, R12, R14, PSR are -> caller saved registers R4~R11 are -> callee saved registers
Exception Handling
| 简写 | 全称 |
|---|---|
| 0x00 | Reset |
| 0x04 | Undefined Instruction |
| 0x08 | Software Interrupt |
| 0x0C | Prefetch Abort |
| 0x10 | Data Abort |
| 0x14 | Not Assigned |
| 0x18 | IRQ |
| 0x1C | FIQ |